Department of Electronics and Telecommunication Engineering

Events

 

PARENT’S MEET

(Academic Year 2016-17)

  • Date of Conduction : 7th Jan 2017,
  • Organized By: Electronics & Telecommunication Engineering Department
  • Faculty Co-ordinator : Prof. Sneha Kulkarni
  • Description : Parent’s Meet was organized for parents of SE, TE  and BE(E&TC)  students by Department of E&TC, NBNSSOE, Pune.

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Faculty Orientation Workshop on “Control Systems”

  • Date of Conduction : 15th to 17th December 2016

  • Organized By: Electronics & Telecommunication Engineering Department

  • Description : The Electronics & Telecommunication Engineering Department organized 3 days Faculty Orientation Workshop on SE (E&TC/Elex) Revised Syllabus 2015 Course Under the aegis of Board of Studies, Electronics, Savitribai Phule Pune University for the subject “Control Systems”. Workshop has got very good response, seventy six faculties participated from various colleges. This workshop covered all six units of the subject ‘Control Systems’.
  • Faculty Co-ordinators : Prof. S. D. Sawant   , Prof. J. A. Desai

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Workshop on Android Application Development

  • Date of Conduction : 19 th Sept 2016 to 20 st Sept 2016
  • Organized By: Electronics & Telecommunication Engineering Department
  • Description : Under the part of VAP-V (Value Addition Program), workshop has been arranged. The workshop was conducted on “Android Application Development”. The final year (B.E.) students were engaged with good practice with hands on experiments on Android OS & Application development. Under this workshop, students succeed in attaining exposure to latest technology available in the market and best industrial practices. This exposure helps students in understanding subject in better way and helps in great excellent while in electronic industry.
  • Faculty Co-ordinators : Prof. H. N. Lokhande

 

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Texas Instruments India Analog  Maker  Competition 2015


  • Date of Conduction : 12 th & 22nd September 2015
  • Organized By: SSC –E&Tc club
  • Description : Electronic circuit design competition was conducted for UG and PG students in association with EdGate Technologies Pvt. Ltd.Under Texas Instruments India University  There were  two rounds . 115 groups were participated .32 groups were qualified for Round II. Two winning teams were selected from Round II.
  • Winning teams - 1.Amol Datar and  Akshay Waghmare - TE  (E&TC)

2.Prasiddhi Khairnar  and Akanksha Agarwal- ME(E&TC)

  • Faculty Co-ordinator : Dr.Mrs.S. D. Shelke.

TI

Round 1 : Design using WEBENCH

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Prize Distribution: Amol Datar & Akshay Waghmare

 

PIC Programming Competition

  • Date of Conduction : 15th February 2016.
  • Organized By: SSC –E&Tc club
  • Description : PIC programming Completion  was conduced for E&Tc students in association  with  Logic Power, Pune, Sole Licensed Tool Manufacturer for Microchip in India (Prizes sponsored by Logic Power). It was conducted in three rounds.21 groups were participated.
  • Winning teams: 1. Saurabh Kulkarni, Nikhil Kumar  2. Shubham Bonde, Ajay Zaware
  • Faculty Co-ordinators : Dr.Mrs.S. D. Shelke ,  Prof. Mrs. N.S.Gujar,   Prof.H.N. Lokhande.

 

PIC

Hardware implementation

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Prize Distribution by Mr. Prashant Shirpurkar Director, Logic Power

 


Two days workshop on ‘CMOS IC Design using  Empyrean EDA Tools’


  • Date of Conduction : 29th & 30th June 2015
  • Organized By: E&TC Department.
  • Description : Two days workshop on ‘CMOS IC Design using  Empyrean EDA Tools was  conducted for faculties  from different colleges under SSPU   and UG/PG students. In association with  Ambition Technologies and Silicon Automation   Systems .
  • Resource Person: Mr. Rahul Sharma, Ambition Technologies, New Delhi &  Mr. Shridhar Dudam, PICT, Pune.

 

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Mind Spark



Mind Spark
Mind Spark-1

A general knowledge quiz was conducted for UG students under the inaugural function of ‘Electronics and Telecommunication Engineering Students Association’ (ETSA).

  • Faculty Co-ordinator: Mrs. S. M. Jog
  • Date: 8 July 2013
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 50

Enabling Revolution


One day seminar ‘Enabling Revolution’ for the awareness of various modern electronic equipments understanding for hands on experiences in the lab was organized under ETSA.

  • Faculty Co-ordinator: Mr. P. W. Kulkarni
  • Date: 20 July 2013
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 80 (UG)
  • Resource person: Atul Kuchekar (Cyronics)
Enabling Revolution

VHDL Codes and Simulation


VHDL

A seminar on ‘VHDL Codes and Simulation’ was organized for SE students to understand the behavioral and structural modeling in Xilinx software.

  • Faculty Co-ordinator: Mrs. S. A. Sahane
  • Date: 7 Sep 2013
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 70 (UG)
  • Resource person: Nagesh Vaidya (C-DAC)

Embedded Systems


A seminar on ‘Embedded Systems’ was organized for UG and PG students to create awareness about the preparation of final year projects. Few models based on embedded systems were demonstrated.

  • Faculty Co-ordinator: Mrs. S. N. Kulkarni
  • Date: 6 Jan 2014
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 70 (UG and PG
  • Resource person: Aniket Katyayan, Praneet Parthi (Talent Sprint)
Embedded Systems

To Know Yourself


To Know Yourself

ETSA organized a workshop on ‘TO KNOW YOURSELF’. The guest lecturer was Dr.Aruna Kaulgud. She taught S.E & T.E students to know about you. She also explained how to speak in different area or different places for different target groups. Various management games were conducted for the students.

  • Faculty Co-ordinator: Mrs. J. A. Desai
  • Date: 5 August 2013
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 70 (UG)
  • Resource person: Dr. Aruna Kaulgud (Director, Rambhau Mhalgi Pratishtan)

Pipelined VLSI Architecture


‘Pipelined VLSI Architecture’ was a one day Seminar. The seminar was conducted by Dr. Mrs. Shaila Subbaraman (Doctorate from IIT, Bombay). She has covered many aspects of Pipelined VLSI Architecture. She started the session with review of high speed Architecture and introduced pipelining. Madam covered pipelined processor, parallel processing, folding, unfolding in detail. Next, she explained about pipelined algorithm, in which Feed forward cutset algorithm and coarse grained VS fine grained pipelining was discussed. Then she talked about very important topics regarding pipelining such as Power Reduction and Speed.

  • Faculty Co-ordinator: Mrs. N. S. Gujar
  • Date: 5 Feb 2014
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 56 (UG and PG)
  • Resource person: Dr. S. S. Subbaraman

VLSI

Scilab


Scilab

Scilab is an Open source, cross platform numerical computational package and a high-level, numerically oriented programming language. It was a two- day workshop which was conducted by faculty from IIT Bombay.

  • Faculty Co-ordinator: Mrs. S. S. Kukade
  • Date: 5-6 Feb 2014
  • Venue: Seminar Hall (Third Floor), OS and SL-II Lab (5th Floor)
  • No. of participants: 63 (UG and PG
  • Resource person: Mr. Swapnil More, Mr. Rupak  Rokade (IIT-B)

Programmable System on Chip


A one day seminar ‘Programmable System on Chip’ was organized under Techtonic 2014. The session includes the architectures of PSOC1, PSOC2 and PSOC 3 systems as well as its applications.

  • Faculty Co-ordinator: Dr. Mrs. S. D. Shelke
  • Date: 6 Feb 2014
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 83 (UG and PG)
  • Resource Person: Mr. S. S. Dudam

Seminar on Arm


The resource person covered ARM architecture including features, various modes, registers in each modes and on-chip peripherals. He also explained the programming model for ARM system development. He introduced various industrial applications on ARM9.

  • Faculty Co-ordinator: Dr. Mrs. S. D. Shelke
  • Date: 7 Sep 2013
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 20 (PG)
  • Resource Person: Mr. Siddharth Gore, Marvell Semiconductors

Android


Mr. Sudhish, Talentsprint conducted two-day workshop on Android. He covered the session from exam point of view in addition to giving lots of inputs for Android-based projects. The sessions were thoroughly conducted. They were structured and had good blend of theory and hand-on sessions.

  • Faculty Co-ordinator: Dr. Mrs. S. D. Shelke
  • Date: 10-11 Oct  2013
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 20 (PG)
  • Resource Person: Mr. Sudhish, Talentsprint Education Services, Hyderabad

MATLAB for Signal Processing


The resource person introduced the toolbox for Signal processing in MATLAB. He demonstrated the use of the toolbox for audio signal processing. He also showed the application of various filters on the audio signal and compared the performance of the filters. He explained how MATLAB is used for application development in industry.

  • Faculty Co-ordinator: Dr. Mrs. S. D. Shelke
  • Date: 14 Feb 2014
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 20 (PG)
  • Resource Person: OTIS Elevator Company, Pune

Syllabus Revision of TE (E & TC / Electronics), 2012 Course


Honorable BOS Chairman and Principal RSCOE, Dr. D. S. Bormane and BOS member and Principal SCOE, Dr. S. D. Lokhande conducted the meeting along various experts invited from various engineering colleges in the university. 38 participants attended the workshop including BOS members, Academic Council members, Senate members, Principals, Heads of departments and senior faculty members. Dr. M. B. Mali, HOD (E & TC), SCOE and Dr. Y. Ravinder, HOD (E & TC), PICT delivered presentations on the proposed structure of TE (E & TC) subjects. Prof. D. G. Bhalke, HOD, RSCOE and Prof. D. M. Chandwadkar, HOD, K. K. Wagh IEER, Nashik delivered presentations on TE (Elex) subjects.

  • Faculty Co-ordinator: Dr. Mrs. S. D. Shelke
  • Date: 3 Mar 2014
  • Venue: Seminar Hall (Third Floor)
  • No. of participants: 38
  • Resource Person: BOS Chairman and Principal RSCOE, Dr. D. S. Bormane

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